1. Field
Embodiments of the present invention generally relate to methods for lowering the dielectric constant of low-k dielectric films used in semiconductor fabrication.
2. Description of the Related Art
The dielectric constant (k) of dielectric films in semiconductor fabrication is continually decreasing as device scaling continues. Minimizing integration damage on low dielectric constant (low-k) films is important to be able to continue decreasing feature sizes. However, as feature sizes shrink, improvement in the resistive capacitance and reliability of dielectric films becomes a serious challenge.
Porous low-k dielectric films including for example, carbon-doped oxides (CDO), experience damage to their bonding structures when exposed to integration steps such as, but not limited to, polishing, etching, ashing, and cleaning. Dielectric films having a higher k-value may be better able to survive subsequent integration steps; however, a lower k-value is typically desirable in the final film as feature sizes shrink. For example, for a damascene process, a patterned low-k dielectric film is typically filled with copper followed by a chemical mechanical planarization (CMP) process to planarize the copper film. A dielectric film having a higher k-value would be more mechanically robust and better able to survive the CMP process without significant damage. Whereas a dielectric film having a lower dielectric constant would be less mechanically robust and significantly damaged by the CMP process.
Thus, a method for lowering the k-value of dielectric films is necessary to improve efficiency and allow for smaller device sizes.